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Full IEC 61131-3 browser IDE: LD, ST compiler, Kahn's DAG FBD, IL decompiler, and 1-bounded Petri Net SFC with action qualifiers (N, S, R, P, L, D). Features IO pin mapping, CiA 402 Servo Motion, and Modbus TCP binary runtime.
Zero-backend pure client-side IEC 63278 / IDTA 01005 package explorer. 848-element recursive metamodel parser, SAMM aspect model to AAS generator, and EU Digital Product Passport (DPP) reference preview.
Deterministic dual active/passive PLC redundancy with physical hydraulic telemetry, WebGL 3D viewports, and ISA-101 high-performance SCADA faceplates for municipal booster pumping.
Reference Architectural Model Industry 4.0 (RAMI 4.0) mapping, IEC 61131-3 conformance test matrix, failure mode autopsies, and Monte Carlo reliability simulation roadmap.
In-Studio reasoning dock providing deterministic plant state interpretation, safety interlock auditing, and semantic diagnosis. Architecture prepared for on-device local SLM integration.
Carter Gray field fault linter, hygiene gate, and staged write trust layer protecting PLC memory from unauthorized actuation across Modbus, LoRaWAN, and Sparkplug B.
IEC 61131-3 located memory map (%IX, %QX, %MW) and Modbus holding register dictionary for simulated station field tags and signal ranges.
Jitter-isolated background web worker executing 100 Hz scan loop off-main-thread with seqlock process image.